Forum Post: RE: GPMC_DIR signal conflicting with PRUETH1_SPEEDLED
Sure, I should have pointed you to this. Sorry for forgetting about this. The GPMC timings are very flexible and you can configure it to meet a lot of peripheral timing requirements.
View ArticleForum Post: RE: Sitara Linux SDK 7.0 and jackd. Infinity alsa_pcm xrun problem
Hi Josh!Actually I'm watching three different situations with SDK7.0:1. infinity alsa_pcm xrun loop, with not extremly high CPU load, both consoles either USB or SSH work well. Ping works. I can kill...
View ArticleForum Post: RE: Reg.RMII interface
[quote user="Ibram sahibu"]There is no RX enable in the RMII interface as per the datasheet. so which one you are referring to?[/quote]I am talking about pad configuration registers. See section...
View ArticleForum Post: RE: AM335x clock: Could not find fieldval 0 for clock...
Hi BiserWe use customer's MLO with our u-boot.img and uImage, It is no crash and work fine, then we very sure the root cause at MLO, so where maybe it is wrong at x-loader?,so that we can to fix it?...
View ArticleForum Post: RE: AM335X with 2 ethernet interface can't be pingable if only...
Hellothanks !yes this a good link, but drivers/net/phy/smsc.c is not compiled for my kernel. I have a 88E3018 and 88E1118 PHY ; do you know where could be set the power saving for these PHY ?regards
View ArticleForum Post: RE: booting process stuck while waiting for mmcblk0p2
Ah , okay. That's what I assumed. Well, I used sudo gparted to first clear out my SD card. Then I initially used the create-sdcard script from /bin folder to make the SD card but I found that the two...
View ArticleForum Post: RE: GPMC_DIR signal conflicting with PRUETH1_SPEEDLED
Thanks for the helpful link Pratheesh - I hadn't seen it before. Are there similar API wikis for the other PRU-based protocols (EPL, etc?) I searched but couldn't find any.
View ArticleForum Post: RE: AM335x Custom board WL18xx on mmc2/3
Hi Biser,sorry for chasing you,but I think clock is enabled I can meassure that Signal on TIWL18xx.Or do you talk about MMC2 module?When yes how is this done in DT ?Regards Reinhard
View ArticleForum Post: RE: Reg.RMII interface
This is very odd...I'm not sure what one would have to do with the other as MDIO and RMII are completely separate interfaces. Can you scope the MDC and see if the clock stops when you set RMII2_REFCLK?
View ArticleForum Post: RE: AM355x GPMC_CLK (V12) Pin
Hi Biser,thanks for the reply. Our software and FPGA designer here needs the GPMC_CLK exactly equal to the Master Input Clock, which in our case is 25Mhz. Not having same phase and jitter is ok. They...
View ArticleForum Post: RE: SquashFs with Beaglebone
Thanks Rajam.I resolved it as well. In my case it was an incorrect destination for the 'of' parameter of the dd command.Now I need to clean up the rootfs drop to deal with the read-only partition.
View ArticleForum Post: RE: 3.12 on AM335X -- USB DMA problem
What exactly was different, I've looked through the 3.15 compared to the 3.12 from SDK 7, and nothing jumps out.thanks,Paul
View ArticleForum Post: RE: booting process stuck while waiting for mmcblk0p2
This may or may not help you, but I ran into this same problem on my board and the solution was editing the device tree for both MMC0 and MMC1 to include vmmc-supply regulator. Before, the...
View ArticleForum Post: RE: sDMA_Access.gel
Hello Michi,I am not aware of the behavior of that gel file. I will move this thread to the Sitara forum where the experts there can help you best.ki
View ArticleForum Post: RE: am335x: what internal hw register can the M3 access.
The M3 can only access L4_WKUP peripherals so can't access GPIO2 module.
View ArticleForum Post: RE: What happened to SmartReflex
Thanks for the response. Assuming that SmartReflex is functional in SDK 6.0 I'll try reverting to that to test it. Matt S.
View ArticleForum Post: RE: am335x: powerdomain won't transition.
I'm not sure how to make this any more clear than I did as I described exactly the test that is done in wakeup code that is running on the M3. But that test failure is then propagated up to linux...
View ArticleForum Post: RE: Question about AM335x public RAM Memory Map
402Fxxx is inside MPUSS, 4030xxxx is a different memory that's attached to the L3 interconnect.When trying to access 402Fxxxx, be sure to do it through the Cortex-A8 itself and not through DAP, since...
View ArticleForum Post: RE: AM335x USB1 DRVVBUS in host mode
[quote user="xiaoyi chen"]but it doesn't work in AM335x EVM board.[/quote]Which EVM board do you refer to? Which software version are you using?
View ArticleForum Post: RE: AM335 Ethernet UDP to CAN data transfer rate question
Hi Mitchell.WinCE is a third-party product, developed by Adeneo Embedded. It's not supported by TI. Here is a link to Linux PSP performance:...
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