Forum Post: RE: AM335X with 2 ethernet interface can't be pingable if only...
Helloi don't think it isa problem of different subnet : the 2 interfces can be pingable if both cable ethernet are plugged.If one is not plugged on the target, i can't ping the interface that is still...
View ArticleForum Post: RE: TPS65910A's VRTC connects to AM3352's VDDS_RTC
[quote user="Darrin Hansen"] If it is an absolute must to power this rail, could we just use any other 1.8V supply instead?[/quote]Yes, this is the correct solution. It's shown in the RTC table in the...
View ArticleForum Post: RE: debrick.scr
Ron,I don't have any need for adding it. The reason behind me asking this question is, I'm facing one problem - afterbooting over usb( image generated by make am335x_evm_nor_usbspl) or if uboot comes...
View ArticleForum Post: RE: Booting problem In AM335x EVM using SDKv7.00 using SD card.
Hello Friends, I am also able to resolve this problem. It was totally hardware problem. SD card detect pin is not getting shorted with GND i.e Body of SD card cover So push that make short it...
View ArticleForum Post: RE: AM335x USB host activation problem (kernel 3.12.10)
Bin,the attached log is produced with a kernel, that is compiled exactly with your recommended config (omap2plus_defconfig). It also includes the module loading ("modprobe musb_am335x") in the last two...
View ArticleForum Post: RE: AM335x: USB Babble Interrupt upon USB remote wakeup
i tried following1. added line "otg" in the file am335x-bone-common.dtsi as below usb@47401800 { status = "okay";...
View ArticleForum Post: RE: AM3352 RTC
See Note A below Figure 6-2 in the AM335X Datasheet Rev. G:"RTC_PWRONRSTn should be asserted for at least 1 ms to provide enough time for the internal RTC LDO output to reach a valid level before RTC...
View ArticleForum Post: RE: BCH Code
Depends on the OOB area of your NAND. Please read here: http://processors.wiki.ti.com/index.php/Raw_NAND_ECC#Is_it_possible_to_use_any_ECC_algorithm_for_any_NAND.3FBest regards,Miroslav
View ArticleForum Post: RE: MMU Disable after Suspend and Restart
Hi,Currently I am working with DDR2 Configurations. I am very new to this. There is codes for mmu (mmu.h and mmu.c) in starterware example. In that ddr is also configured. I am not able to understand...
View ArticleForum Post: RE: AM335x Custom board WL18xx on mmc2/3
As Steve suggested here, this can be done in <u-boot>/arch/arm/cpu/armv7/am33xx/clock_am33xx.c.Best regards,Miroslav
View ArticleForum Post: RE: Question about AM335x public RAM Memory Map
Hi Matt,Thank you very much for your explanation. I was checking one block diagram that shows exactly what you are saying.Sincerely,J. Ventura
View ArticleForum Post: RE: TPS65910A's VRTC connects to AM3352's VDDS_RTC
Thank you Biser - I had forgotten that was stated in the schematic checklist.Darrin
View ArticleForum Post: RE: Am335x ADC Hardware Synchronization Issue
Madan,Did you enable the HW synchronized steps in the STEPENABLE register?-Tyler
View ArticleForum Post: RE: question about AM335x read data from FPGA
We meet a problem when we use the GPMC to connect to the FPGA: the shortest interval between two successive read accesses is long (290ns).we can read the data from the fpga, but can not read data in...
View ArticleForum Post: RE: AM335x USB1 DRVVBUS in host mode
Hi Biser,The board I am working on is :AM335x Industrial Automation EVM (AM3359 Industrial Development Kit) and I use IAR embedded workbench for arm.
View ArticleForum Post: RE: AM3359 Die Revision (Rev 2.1) and Errata
No, Internal delay mode is not supported in any silicon revision.This advisory only discusses the default value of the register that enables this mode. In silicon revision 1.0 this mode was enable by...
View ArticleForum Post: AM335x deep sleep 0 power consumption
Hi,We have AM335x based custom platform which is close on Beagle bone black design. We see very high power (~90mA) consumption in Deep sleep 0 mode. TUI Wiki page...
View ArticleForum Post: RE: Problem with Signal On Power Rails: AM3354 and TPS65217
The OSC0 input should not be connected to a 3.3 volt clock source.The data sheet shows the oscillator connected to OSC0 powered by the VDDS_OSC power rail which should be 1.8 volts.Regards,Paul
View ArticleForum Post: AM3517 video1 VRFB mirroring causing GFX_FIFO_UNDERFLOW and other...
Hi there,I'm running into a problem with the display system on the AM3517 (kernel 2.6.37 from PSP 04.02.00.07 with many patches applied). I'm using the AM3517 along with the graphics layer and one of...
View ArticleForum Post: RE: LDI32 PRU instruction
John,The LDI instruction moves the value from IM(65535), zero extends it, and stores it into REG1. Thisinstruction is one form of MOV (the MOV pseudo op uses LDI when the source data is an...
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