Part Number: 66AK2G12 Tool/software: TI-RTOS Hello, My customer would like to confirm the USB FIFO configuration in PDK implementation. Please take a look at C:\ti\pdk_k2g_ \packages\ti\drv\usb\src\dwc\usb_dwc_dcd.c void usbDwcDcdSetConfiguration(usbDwcDcdDevice_t *dwc3) { uint32_t bulkInFifoSize, ep0CtrlMps, epBulkMps; volatile uint32_t regVal; tDeviceInfo* ptDeviceInfo; /* This has to be done based on the speed */ /* Check this logic */ bulkInFifoSize = ((2U * (1024U + 8U) + 8U) / 8U); ep0CtrlMps = 64U; epBulkMps = 512U; Here, it seems like the FIFO size hard-corded by ((2U * (1024U + 8U) + 8U) / 8U). And bulkInFifoSize will be used to configure USB related registers. regVal = HW_RD_REG32(dwc3->baseAddr + DWC_USB_GTXFIFOSIZ1); HW_SET_FIELD(regVal, DWC_USB_GTXFIFOSIZ0_TXFSTADDR, 66U); HW_SET_FIELD(regVal, DWC_USB_GTXFIFOSIZ0_TXFDEP, bulkInFifoSize); HW_WR_REG32(dwc3->baseAddr + DWC_USB_GTXFIFOSIZ1, regVal); regVal = HW_RD_REG32(dwc3->baseAddr + DWC_USB_GTXFIFOSIZ2); HW_SET_FIELD(regVal, DWC_USB_GTXFIFOSIZ0_TXFSTADDR, 66U + 256U); HW_SET_FIELD(regVal, DWC_USB_GTXFIFOSIZ0_TXFDEP, bulkInFifoSize); HW_WR_REG32(dwc3->baseAddr + DWC_USB_GTXFIFOSIZ2, regVal); Considering the macro definitions, these registers would be : 0x0269C304U and 0x0269C308U for USB0 0x0259C304U and 0x0259C308U for USB1 I don`t know whether these are TI specific registers or USB IP Core registers. Can you comment ? Some background: They had a trouble with USB Audio and MSC composite operation with their USB driver code, which is based on TI PDK example. The driver worked basically, but sometimes, something error raised in runtime. And if they changed the FIFO size configuration (bulkInFifoSize in TI driver code), it seemed the error did not happen. So they want to know the reason for that. As you see in the original post, I understand that there is no USB related information in TRM. And we need NDA with USB IP vendor for further information. As for TI wrapper registers, I understand these should be exactly same configuration with TI examples (Ex. PDK or Linux driver implementation). Unfortunately, my customer does not have NDA for now. They are finding right parson to have NDA with IP vendor to get the IP document and understand why the error does not happen by changing the above registers. But, you know, these registers might be TI related registers. So I`m asking if the above registers are TI part or IP vendor part. Best Regards, NK
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Forum Post: RTOS/66AK2G12: USB FIFO configurations
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Forum Post: 66AK2G12: GPMC Questions
Part Number: 66AK2G12 Dear All, we have a custom board with an 66AK2G12 where we interface some chips via GPMC. The PDK I am using is "pdk_k2g_1_0_13" from the latest SDK "processor_sdk_rtos_k2g_5_03_00_07" The TRM I am referring to is "SPRUHY8I January 2016–Revised March 2019" After searching for details I am left with some open points to clarify: For a NOR flash with non-multiplexed data and address lines, is the addressable space really limited to 2KB in size? In the forums I found that for some other devices this statement is only wrong in the TRM but not true for the chip. Please can you tell me what is correct? In the example code located at "pdk_k2g_1_0_13\packages\ti\board\diag\nand\src" there is a call "GPMCLimitedAddrDevSupportConfig" But the affected bit 1 in the GPMC config register is defined as "reserved" in the TRM Please tell me if it is relevant to clear the bit to not have the 2KB address limitation I have problems to understand the address decoding We have a CPLD connected to A1-A3 D0-D7 on CS1 so what is the physical address to be used? There are 8 valid addresses 0x00000000-0x0000000E Are these settings for GPMC_CONFIG7 correct? base: 0b000000, mask: 0b1111 (16MB) So this reserves address range 0x00000000-0x01000000 for CS1 and only 8 addresses are used What is the address I have to use in my code? The GPMC_0_DATA is located at 0x30000000-0x3fffffff from memory map. So will the cs1 address range be 0x30000000-0x31000000? For example to access the first two bytes i can use: volatile uint8_t* byte1_ptr = (volatile uint8_t*)0x30000000 volatile uint8_t* byte2_ptr = (volatile uint8_t*)0x30000002 Is this correct? Looking forward to any reply, Regards Bernhard
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Forum Post: AM5716: Recommended Ethernet PHY
Part Number: AM5716 Hi Experts, A customer has been looking for our recommended Ether Phy with AM5716 . They are considering two devices below: 1)DP83867 10/100/1000 BASE-T 2)DP83822 10/100 BASE-TX Thank you very much for your kind check. Best regards, HItoshi
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Forum Post: Compiler/66AK2E05: GCC 7.2.1 unsupported behavior for C struct designated initializers
Part Number: 66AK2E05 Tool/software: TI C/C++ Compiler Hi , during compilation of one c file I get following error: " sorry, unimplemented: non-trivial designated initializers not supported " Compiler used is gcc (the one included by arago proj.) : /home/ /ti-processor-sdk-linux-k2e-evm-05.03.00.07/linux-devkit/sysroots/x86_64-arago-linux/usr/bin/arm-linux-gnueabihf-gcc --version arm-linux-gnueabihf-gcc (Linaro GCC 7.2-2017.11) 7.2.1 20171011 Copyright (C) 2017 Free Software Foundation, Inc. I have done search on my own and according to this post: link this is a known 'bug' or unimplemented behavior of GCC even though designated aggregator initializers are not a new feature, they rather belong to C99. Do you know when ti (or arago linux first) will include GCC version 8 on their tool chain? If it is coming some time soon I'd rather wait or else I may change my code totally ... Thank you, Br, George
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Forum Post: What assembly instructions does '0x4704(in TI file)' correspond to?
I use CCS to create a Dsp.TI file. In TI file for C54x chip, I found 0xF495 correspond to asm(" nop"); What assembly instructions does '0x4704(in TI file)' correspond to?
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Forum Post: AM5728: Make the camera connected via USB default as built-in camera not working in Android
Part Number: AM5728 Hello experts. I have a AM572x Evaluation Module TMDSEVM572X with me and I have successfully compiled Android SDK 5.03 on it. As per this thread , (posted by me), TI experts have made it clear that camera support is not provided with Android OS on this EVM. However, the USB camera works completely fine when attached to the EVM and is verified using a simple usb cam application. While, on the other hands, the system camera is not being detected at all. Therefore, I would like to customize Android at a source level and add code to automatically switch the default (built-in/system) camera to the one connected by USB when it is available. Or if switching dynamically is not possible then disable the system camera and make USB (external) camera as the default one. This way all applications should detect the external (USB) camera as the primary camera. For example, if I open camera application then the device should take the picture from the one which is connected via USB. I have the Android SDK source code available with me, but I am not sure how to proceed. Really appreciate your help. Thanks!
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Forum Post: PROCESSOR-SDK-AM335X: Boot from NAND
Part Number: PROCESSOR-SDK-AM335X Hi, I need to load the application to nand flash memory and boot the processor from nand flash and the run the application. Could anyone tell me the procedure or details. Regards Gaurav
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Forum Post: RTOS/PROCESSOR-SDK-DRA7X: Frame latency from Vsync Capture to Display Release is high when UC created from RTOS instead from HLOS
Part Number: PROCESSOR-SDK-DRA7X Tool/software: TI-RTOS (Please visit the site to view this file) has increased after starting use case from app/src/rtos/usecase. Timestamps are taken at Capture Side (In Function CaptureLink_drvProcessData ) and On Display Release side (DisplayLink_drvReleaseData). Note: Earlier we use to start the usecase from app/src/hlos/usecase, we use to max latency from Capture to display as 72ms now it is almost doubled.
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Forum Post: AM6548: DMA questions
Part Number: AM6548 Hi Team. I have few questions of DMA. How many transactions can be issued at same time? How is Max Burst length? Thanks and Best regards, Kuerbis
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Forum Post: How core available in this processor?
hi sir, This is what type of processor ? single core processor or dual core processor ?
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Forum Post: AM6548: PCIe transaction size
Part Number: AM6548 Hi Team, What is the maximum transaction size? Is it 128 bytes? What is the maximum payload size? Thanks and Best regards, Kuerbis
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Forum Post: AM6548: USB0 Device enumeration issue
Part Number: AM6548 Hi Team, We have designed a board with AM6548 Processor. We are in board bring up stage. Currently, we are facing an issue with AM6548 USB0 Interface. USB0 is working fine in Host Mode. However in device mode we are facing an issue with device enumeration. We have followed EVM as reference for schematic design. Kindly share your thoughts on this. Thank you. Regards, Sushruta
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Forum Post: Linux/DRA745: vsdk sd boot issue in customer board
Part Number: DRA745 Tool/software: Linux Hi,experts In customer board, when boot from sd, encountered below issue U-Boot SPL 2016.05-00003-ga6ba0dc-dirty (Jun 06 2019 - 18:40:36) DRA722-HS ES2.0Trying to boot from MMC1 spl: loading remote core image dra7-ipu2-fw.lzop mmc 1 mode HS(sd) part_init: try 'EFI': ret=-1 part_init: try 'DOS': ret=-1 CACHE: Misaligned operation at range [80a01174, 80a01974] ** First descriptor is NOT a primary desc on 0:1 ** part_init: try 'ISO': ret=-1 mmc_init: 0, time 97 (retries 0) ## Unknown partition table type 0 ** Partition 1 not valid on device 0 ** spl_register_fat_device: fat register err - -1 spl: error reading image dra7-ipu2-fw.lzop, err - -1 Error loading remotecore IPU2!,Continuing with boot ... spl: mmc boot mode: fs ## Unknown partition table type 0 ** Partition 1 not valid on device 0 ** spl_register_fat_device: fat register err - -1 spl_load_image_fat: error reading image u-boot.img, err - -1 ## Unknown partition table type 0 spl: no partition table found SPL: failed to boot from all boot devices ### ERROR ### Please RESET the board ### could you help to check ? The project is urgent.
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Forum Post: TMS320C6455: TMS320C6455 CVdd power supply
Part Number: TMS320C6455 Dear Sir/Madam, we are using TMS320C6455 850MHz processor, powering it's core CVdd with 1.2V power supply. What will happen, if we use 1GHz TMS320C6455 processor (which requires 1.25V according the datasheet) instead, powering it with the same 1.2V? Considering it will have the same 850MHz application to run. Can 1GHz/1.2GHz DSP work on 1.2V core supply using lower speed? Best regards, Arkadijs
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Forum Post: RE: TMDXIDK5718: Replacing TLK105 with DP83822
Hi Rakesh, I will look into this but I suggest you post this question on the E2E forum supporting the DP83822 PHY. That forum will have the expertise on issues such as the NC pins. Regards, Bill
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Forum Post: RE: AM6548: USB0 Device enumeration issue
We are using RTOS and below is the file that we are referring to. ti-processor-sdk-rtos-am65xx-evm-05.03.00.07-Linux-x86-Install.bin Regards, Sushruta
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Forum Post: RE: RTOS/TMS320C6657: DbgPrintf does not print to console
Yordan, I do not see any output to the UART console either. I have the EVM's 3-pin UART connected to my PC and have verified that it is setup correctly by running the UART test provided with the PDK's platform_test_evmc6657l project. I verified that the _oscfg.DbgPrintLevel is set to 1, so print statements at DBG_INFO level should be displayed. In the ServiceReport ( ) callback function, there are 3 print statements, each using a different function: System_printf, DbgPrintf, and printf - only the raw 'printf ( )' output is displayed. The DbgPrintf and System_printf are not displayed. Jim
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Forum Post: RE: AM5706: DHCP packets have MAC source Address set to all zeros
Hi Karla We have not seen this before i assume you are using linux? Also you mentioned CCS are you looking at the DSP? Can you send us the boot log also that would help. Thanks
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Forum Post: RTOS/AM5728: Remoteproc error
Part Number: AM5728 Tool/software: TI-RTOS Hi, So I have this project where I use the EMAC driver together with ipc / remoteproc. It works fine when I run it compilted with debug configuration, but when I change to the release configuration I get the following error when I try to load the program with remoteproc: erroneous trace resource entry Failed to process resources: -22 Probably something gets optimized away. I followed this guide to set the application up, so any ideas where it might need a volatile? If it helps, here the project code (Please visit the site to view this file)
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Forum Post: RE: RTOS/TDA2EVM5777: Split screen in LINUX TDA2xx
Salman, Did this resolve your issue? I am closing this thread. - Subhajit
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