Forum Post: RE: Schematic revisions on ICE3359 2.1A
Pedro,there are two different baords: TMDSICE and TMDXICE....the one from 31.1.2014 is the latest one.
View ArticleForum Post: RE: How to make bootable SD/MMC via Windows
Based on your requirements, the TI folks can prolly advise you better on which toolchain to use. For now, all you need is an SD card with an MBR (master boot record). On a Win PC, the TI SDCard boot...
View ArticleForum Post: RE: AM335X RTC stops during kernel booting
What is your definition of cold reset?You should assert the RTC_PWRONRSTn input along with the PWRONRSTn input the first time power is applied to the product, but you would only assert the PWRONRSTn...
View ArticleForum Post: RE: Clock cycle counter?
Hi Hans, See this link: http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0344k/Bgbjjhaj.html. You can find more information about the Cortex-A8 on www.arm.com.
View ArticleForum Post: RE: SDK release date(s)? (AM335x / WL8)
Dear Josh,Checking in on the progress for PM / Sleep on the 3.12/.13/14 branches.Let me know status. best David
View ArticleForum Post: RE: Powering am3352 & DDR3L with TPS65910
DDR3L memories are backward compatible with DDR3 and can operate at 1.5V. Currently there is no TPS65910A version factory programmed for 1.35V. The TPS65217D supports 1.35V. Resistor dividers on...
View ArticleForum Post: RE: Am3359 run QT
Kent, we only support the official TI AM335x EVMs. Obviously Embest have done some modifications to their MLO/U-Boot/kernel for their board. Our SDK doesn't support EVMs other than ours, without...
View ArticleForum Post: RE: How to disconnect the AM335x USB as the device mode from the...
Hi Daisuke, Here is the reply from the factory team: Once SOFTCONN is cleared, the host will not see the pullup. It does not matter if the pullup still exists on the device side or not.
View ArticleForum Post: RE: AM3352 Memory Write and Read Problem
Hi Jun, Which reserved registers do you mean? The RTC scratchpad registers are not reserved, they are general use registers.
View ArticleForum Post: can't run Qt SW(helloworld in lab1 from sitara Linux Training:...
Now I am using Embest DEVKIT8600 board with QT, which use AM3359 main chipset. Have set Host linux PC(include arm cross compile and QT creator), connected PC and Embest DEVKIT8600 board using serial...
View ArticleForum Post: RE: OLED display interface with AM3505 SoC
See sections 12.2.1.1.2 - 12.2.1.1.4 in the AM35X Technical Reference Manual.
View ArticleForum Post: RE: kernel configure 2 Ethernet ports in am335x
Daniel, What is your network topology? How are the two PHYs connected to the network?
View ArticleForum Post: RE: using fw_setenv to write U-boot environment variables to nand...
http://e2e.ti.com/support/embedded/linux/f/354/t/153455.aspxAbove link has the solution. May be worth to try this
View ArticleForum Post: RE: can't run Qt SW(helloworld in lab1 from sitara Linux...
This is the older toolchain, which doesn't have hard floating support. I believe it was included in the previous SDK version 05.07.00.00. The latest SDK version 06.00.00.00 uses arm-linux-gnueabihf...
View ArticleForum Post: RE: arm-2009q1-203-arm-none-linux-gnueabi comaptible which QT...
You have already opened a thread on this topic. Please do not double-post on this forum.
View ArticleForum Post: RE: OLED display interface with AM3505 SoC
Sorry, I cannot do that. TI does not manufacture LCD displays.
View ArticleForum Post: RE: AM335x BogMIPS
Linux Bogomips is calculated by executing a simple loop:- count down a register- jump back if register > 0For ARM Cortex A8, you need 2 Instructions for each loop iteration. You will get 800.000.000...
View ArticleForum Post: RE: How to debug smart reflex hardware issues?
I think, that the reason that I do not get 600/720MHz OPPs are because of u-boot setting core to 1100mV. I have learned that in sdk 06.00.00, there's a new function, am_opp_update() which disables...
View ArticleForum Post: RE: AM335x SYSBOOT pins latch timing
Hi Biser,Thank you for your reply.Best regards,Daisuke
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