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Forum Post: RE: How to debug smart reflex hardware issues?

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I think, that the reason that I do not get 600/720MHz OPPs are because of u-boot setting core to 1100mV. I have learned that in sdk 06.00.00, there's a new function, am_opp_update() which disables OPP120+ with this core voltage. So it turns out that regardless of SR activated in kernel or not, OPP120+ is no longer around. I started looking into this with older kernels, (without the am335x_opp_update() call), which is why those boards where running all OPPs at core 1100mV, and I made the wrong assumption that it was SR that made the OPP120+ go away.  I'm not running from USB.

Disabling OPP120+ when core is at 1100 makes sense, looking into the reference manual. (Talking about ES1.0 parts). My take on this, is that I need to change u-boot to start board with 1200mV core to get these OPPs?

But should SR really be allowed to lower core to 1026 and mpu to 976 when running on ES1.0 silicon @OPP100? According to sprs717f minimum voltage at OPP100 is 1056mV for both core and mpu. But maybe this is what SR does, going further down, below specified minimum? But then again, why then disable OPP120+ at 1100 (ES1.0) if SR is allowed to below spec.?

I have done some investigations to IR drop, but there's nothing obvious there. There's some switching noise from the primary 5V regulator which is quite obvious in the 65217 area, but at the am335x, it is rather smooth. But maybe we are talking about so small IR drops that it is hard to make them out with just a scope and multimeter. How close to the limit will SR press the envelope? Multimeter gives about 1,5mV drop on both core and mpu (just for reference, multimeters are obviously not the best tool here), scope gives really just noise in the area of 50mV.

Thanks,

 Micael


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