Chandra,
The below needs to be done by the assembly code to configure the upper address balls for MUX_MODE2 NOR flash boot.
Configure ZCZ Ball Mode# Pad Control Reg Adress Offset
LCD_DATA8->GPMC_A12 U1 1 0x8C0
LCD_DATA9->GPMC_A13 U2 1 0x8C4
LCD_DATA10->GPMC_A14 U3 1 0x8C8
LCD_DATA11->GPMC_A15 U4 1 0x8CC
LCD_DATA12->GPMC_A16 V2 1 0x8D0
LCD_DATA13->GPMC_A17 V3 1 0x8D4
LCD_DATA14->GPMC_A18 V4 1 0x8D8
LCD_DATA15->GPMC_A19 T5 1 0x8DC
MMC0_DAT3->GPMC_A20 F17 1 0x8F0
MMC0_DAT2->GPMC_A21 F18 1 0x8F4
MMC0_DAT1->GPMC_A22 G15 1 0x8F8
MMC0_DAT0->GPMC_A23 G16 1 0x8FC
MMC0_CLK->GPMC_A24 G17 1 0x900
Here's the corresponding assembly code to configure balls:
asm("stmfd sp!, {r2 - r4}"); // save register context
// Configure GPMC[A19:12] balls
asm("movw r4, #0x8C0"); // pad config registers begin @ address 0x44e108c0
asm("movw r3, #0x44E1");
asm("orr r4, r4, r3, lsl #16");
asm("mov r2, #9"); // set 8 balls to mode 1 with pull disabled
asm("mov r3, #8");
asm("gpmc_mux: str r2, [r4], #4");
asm("subs r3, r3, #1");
asm("bne gpmc_mux");
// Configure GPMC[A24:20] balls
asm("movw r4, #0x8F0"); // pad config registers begin @ address 0x44e108f0
asm("movw r3, #0x44E1");
asm("orr r4, r4, r3, lsl #16");
asm("mov r2, #9"); // set 5 balls to mode 1 with pull disabled
asm("mov r3, #5");
asm("gpmc_mux1: str r2, [r4], #4");
asm("subs r3, r3, #1");
asm("bne gpmc_mux1");
asm("ldmfd sp!, {r2 - r4}"); // restore register context
Please review & try it out.
Regards,
Mark