Hi Biser,
Thank you for the reply.
I understood.
My customer are asking me about configuration of IPU/IPD for DDR3 unused pin(DQS/DQSn).
They will PU/PD the DQS1/0 and DQSn1/0 externally, so that I will tell them to
disable the IPU/IPD from the ddr_data0_ioctrl Register and the ddr_data1_ioctrl Register.
best regards,
g.f.