Hi,
On our board we have a system reset coming as input. This system reset is AND with the NRESPWRON signal of PMIC and given as PORZ to AM3352. I have few doubts -
- When the system reset is made low the PMIC will remain in the same operating mode (OPP). Which means all the power supplies will be different from what is the default state of PMIC. In this case will there be any issues when AM3352 boots up?
- Does the AM3352 does has any interaction (with PMIC) when the reset is applied other than making the NRESETIN_OUT low.
- Also when the internal watchdog reset is asserted for AM3352 is it reflected on the NRESETIN_OUT pins also?
Thanks & regards,
Nikhil