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Forum Post: RE: PinMux for GPMC access to 2MB (16-bit wide) SRAM

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Hi Biser,

This is where I got confused. I initially drew it the way you suggested in the first revision, but found this inconsistency, that's why I changed but confused.

In multiplexed 16-bit Data mode, if GPMC_AD0 multiplex address A1, then GPMC_AD15 should multiplex address A16, but from Table 7-5, address A16 is output by GPMC_A1. This means I have duplicated address A16? Or GMPC_AD15 does not multiplex A16?


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