Hi Wolfram, [quote user="Wolfram Stumpf16"] Would the following subset of pins be sufficient: vin1b_clk1 vin1b_d0 - vin1b_d7 vin1b_hsync1 vin1b_vsync1 ? [/quote] Yes. However, if you use NTSC/PAL input, you will need also the FID pin. If you have BT656, the sync signals & the field will be embedded in the data stream. Best Regards, Yordan
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Forum Post: RE: Using AM5728 video input with ADV7180
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Forum Post: RE: Using AM5728 video input with ADV7180
Thanks Yordan, am I right with this: If I set AVD7180 to BT.656 mode and AM5728 SYNC_TYPE to any of the embedded modes, I would be totally good with the 8 data pins + clock without using any discrete sync signals? Why did you point out PAL/NTSC specifically? ADV7180 seems to convert whatever it sees on its analog front end to digital BT.656. Wouldn't the necessary signalling be embedded for PAL and NTSC then? Regards Wolfram Stumpf
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Forum Post: RE: AM37x EVM (UART DMA Trigger)
Hi Haider, 1. Could you share the values of (TLR_REG[7:4] RX_FIFO_TRIG_DMA) and (FCR_REG[7:6] RX_FIFO_TRIG) which you are setting when get the SDMA request after 3 bytes? 2. Also after what number of bytes would you like to get the SDMA request? BR Tsvetolin Shulev
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Forum Post: RE: Unable to set SPI Dat Line
Interesting.. no matter what I set the direction to, I get the same results. Setting the direction is the last operation I do before going into a non-spi-modifying-endless-loop of reading (only). I have verified I am setting bit 0x100 in the SYST register located at 0x124 offset from the chosen SPI. But my question still remains--- what causes the same output to go across D0 and D1 at the same time? Or does nothing do that? Another way to answer my question(s) would be: Is there a "map" of functions that are defined for bringing the SPI up? You know, as in "step 1, do this, step 2, do that". There are so many tweaks on this component and so few coherent examples available. Thank you! Bryan
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Forum Post: RE: AM57xx EVM board x11 port
Hello, Is there a technical reason for this? What would it take to build it myself? Is there another project that includes X11 for this platform? Thank you Rafael
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Forum Post: RE: Beaglebone black doesnt run initramfs to flash emmc
Hi Yordan, I checked the addresses from u-boot, and it seems they are correct. I also use am335x-boneblack.dtb, isnt it correct for beaglebone black ? U-Boot 2015.10-00001-g143c9ee (Nov 06 2015 - 15:27:19 -0600), Build: jenkins-github_Bootloader-Builder-274 Watchdog enabled I2C: ready DRAM: 512 MiB Reset Source: Global external warm reset has occurred. Reset Source: Power-on reset has occurred. MMC: OMAP SD/MMC: 0, OMAP SD/MMC: 1 Using default environment Net: not set. Validating first E-fuse MAC cpsw Hit any key to stop autoboot: 0 => printenv fdt fdt_addr_r fdtaddr fdtfile => printenv fdtaddr fdtaddr=0x88000000 => printenv loadaddr loadaddr=0x82000000 Umit.
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Forum Post: beaglebone black u-boot optimization
Hi, In below, debian flasher emmc image u-boot.img and MLO output. I want to minimize (now it boots at 2.621 seconds). Currently I suppose that 1sc bootdelay when u-boot is opening, how can I close it? 0.000 0.000: 0.000 0.000: U-Boot SPL 2015.07 (Oct 07 2015 - 14:27:57) 0.000 0.000: reading args 0.066 0.066: spl_load_image_fat_os: error reading image args, err - -1 0.066 0.000: reading u-boot.img 0.066 0.000: reading u-boot.img 0.066 0.000: 0.066 0.000: U-Boot 2015.07 (Oct 07 2015 - 14:27:57 -0400) 0.276 0.000: Watchdog enabled I2C: ready DRAM: 512 MiB NAND: 0 MiB MMC: OMAP SD/MMC: 0, OMAP SD/MMC: 1 reading uboot.env 0.367 0.000: ** Unable to read "uboot.env" from mmc0:1 ** Using default environment 0.514 0.000: Net: not set. Validating first E-fuse MAC Phy 0 not found cpsw, usb_ether Hit any key to stop autoboot: 0 switch to partitions #0, OK mmc0 is current device SD/MMC found on device 0 reading boot.scr ** Unable to read file boot.scr ** reading uEnv.txt 783 bytes read in 9 ms (85 KiB/s) Loaded environment from uEnv.txt Importing environment from mmc ... Running uenvcmd ... switch to partitions #0, OK mmc1(part 0) is current device switch to partitions #0, OK mmc0 is current device 3232496 bytes read in 277 ms (11.1 MiB/s) Booting from external microSD... 32990 bytes read in 98 (328.1 KiB/s) ## Error: "mmcargs" not defined Kernel image @ 0x82000000 [ 0x000000 - 0x3152f0 ] ## Flattened Device Tree blob at 88000000 Booting using the fdt blob at 0x88000000 Loading Device Tree to 8fff4000, end 8ffff0dd ... OK 2.621 0.000: my rootfs is: arago_base_sdk my uEnv.txt is : optargs= loadfdt=load mmc ${mmcdev}:2 ${fdtaddr} /boot/dtbs/${fdtfile} loaduimage=mw.l 4804c134 fe1fffff; if load mmc 0:2 ${loadaddr} /boot/zImage; the n setenv mmcdev 0; mw.l 4804c194 01200000; echo Booting from external microSD... ; else setenv mmcdev 1; if test $mmc0 = 1; then setenv mmcroot /dev/mmcblk1p2 rw ; fi; load mmc 1:2 ${loadaddr} /boot/zImage; mw.l 4804c194 00c00000; echo Bootin g from internal eMMC...; fi mmcboot=run mmcargs; bootz ${loadaddr} - ${fdtaddr} uenvcmd=i2c mw 0x24 1 0x3e; run findfdt; if test $board_name = A335BNLT; then se tenv mmcdev 1; mmc dev ${mmcdev}; if mmc rescan; then setenv mmc1 1; else setenv mmc1 0; fi; fi; setenv mmcdev 0; mmc dev ${mmcdev}; if mmc rescan; then setenv mmc0 1; else setenv mmc0 0; fi; run loaduimage && run loadfdt && run mmcboot There are some errors and warnings on u-boot as you seen, 1) 0.066 0.066: spl_load_image_fat_os: error reading image args, err - -1 2) ** Unable to read "uboot.env" from mmc0:1 ** 3) ** Unable to read file boot.scr ** 4) Error: "mmcargs" not defined how can I fix them? Is there any way to optimize u-boot? (I also read sitara boot time reduction wiki but it doenst help me) Best Regards, Umit
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Forum Post: AM57xx pin mux issue in SDK v2.0
Hello, I have modified am57xx-evm.dts file to access PRU gpio pins. I have noticed that after modification in device tree file, I can not access the pins as a PRU GPIO. When I have read the pin mux registers using devmem2 utility, I come to know that the value of the pinmux registers are not as per my modification. DTS file changes are as below: &dra7_pmx_core { pru_cape_bone_pins: pru_cape_bone_pins { pinctrl-single,pins = ; }; }; &epwmss0 { status = "disabled"; }; &epwmss1{ status = "disabled"; ehrpwm1: ehrpwm@48440200{ status = "disabled"; }; }; &epwmss2{ status = "disabled"; }; &pruss2 { pinctrl-names = "default"; pinctrl-0 = ; }; Please note that I have disable pwm, because the same pins are used for the PWM in current implementation. I want to know that is there any other modification require to change the pinmux value, after updating in dts file?
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Forum Post: RE: beaglebone black u-boot optimization
Debian is not supported on this forum. Please ask on: beagleboard.org/.../Forums
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Forum Post: RE: AM57xx pin mux issue in SDK v2.0
You should check where these registers are modified. Your settings are getting overwritten.
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Forum Post: RE: AM57xx EVM board x11 port
This forum only supports what is included in the TI distributed Linux SDK.
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Forum Post: RE: Processor SDK v2.00.00.00: UBIFS Issue on AM335x EVM
I believe nandtest is not the best tool for testing NAND. I find ubifs errors after running nandtest. I followed the steps from the first post, but omitted the -s 2048 from ubiformat. I kept the -O 2048 for both format and attach. Everything worked fine. Steve K.
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Forum Post: RE: AM57xx pin mux issue in SDK v2.0
I have tried to find out where the pinmux setting changes, but I am unable to locate it. In device tree there is no pinmux settings are available for PWM. Also I have look in to the driver of PWM, but in driver also I am not able to locate pinmux chages. It looks like the driver uses default settings written in u-boot and kernel is not setting those changes for these pins. I want to update pinmux settings for all PRU2 Pins, so could you please help me, how can I do that?
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Forum Post: RE: enet_lwip example not working
I have the serial communication in Tera term working, I get the message that the IP address has been assigned sucessfully ? but unable to open the webpage says ERR_INVALID_RESPONSE. Any suggestions ?
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Forum Post: RE: The RTC on chip of AM335x (omap_rtc) is not working !!
Thank you very much, I have fixed it. There is a pfc9563 on the board, I should disable the omap_rtc and enable pfc9563. BRs
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Forum Post: SPL OS boot
Hi I have using a AM3358 EVM and the ti-processor-sdk-linux-am335x-evm-01.00.00.03. In order to enhance boot speed, SPL OS BOOT Mode want to use. My boot mode is a NAND boot mode. I make uImage and write to NAND, so SPL OS Boot mode is entered But The kernel failed to boot. No message. Kernel imag and am335x-evm.dtb is OK reading from nand. Please help me.
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Forum Post: RE: Cannot use Qt5 with cmake in processor-sdk-02.00.01.07
Hello user4562834 , The compilation fails because of an absent file "/home/roland/SDK/ti-processor-sdk-linux-am335x-evm-02.00.01.07/sysroots/cortexa8hf-vfp-neon-linux-gnueabi/usr/lib/qt5/plugins/platforminputcontexts/libibusplatforminputcontextplugin.so". Best regards, Kemal
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Forum Post: MCASP as slave with dummy I2S codec as master
Hi, I'm working on an am335x project and I am trying to integrate an audio capture-only codec that acts as I2S master and produces sound in LEFT-J format. This codec has no audio controls over i2c. I've set up a dummy codec module that just accepts any parameter and is fixed to 16KHz, 16-bit LE, stereo audio. I've hooked that up to the davinci-evm module and added this DAI: static struct snd_soc_dai_link input_dai_dummy_i2s = { .name = "Dummy I2S Capture", .stream_name = "Capture", .codec_dai_name = "dummy-i2s", .ops = &evm_ops, .init = evm_dummy_i2s_init, .dai_fmt = SND_SOC_DAIFMT_LEFT_J | SND_SOC_DAIFMT_CBM_CFM | SND_SOC_DAIFMT_NB_NF, }; And I've updated the device tree IDs for my new codec: static const struct of_device_id davinci_evm_dt_ids[] = { { .compatible = "ti,dummy-i2s-evm-audio", .data = (void *) &input_dai_dummy_i2s, }, { .compatible = "ti,da830-evm-audio", .data = (void *) &evm_dai_tlv320aic3x, }, { /* sentinel */ } } My evm_dummy_i2s_init is almost the same as the evm_aic3x_init function except I've removed the controls and non-connected pin registration: static int evm_dummy_i2s_init(struct snd_soc_pcm_runtime *rtd) { struct snd_soc_card *card = rtd->card; struct snd_soc_codec *codec = rtd->codec; struct device_node *np = card->dev->of_node; int ret; if (np) { ret = snd_soc_of_parse_audio_routing(card, "ti,audio-routing"); if (ret) return ret; } else { /* Set up davinci-evm specific audio path audio_map */ snd_soc_dapm_add_routes(&card->dapm, audio_map, ARRAY_SIZE(audio_map)); } return 0; } Finally, I added some device tree nodes (in this reduced example I'm working on a beaglebone black) and removed all the HDMI connectivity. I also enabled mcasp in mode 3 so I can use P8's pins 33, 35, and 36. /* * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ /dts-v1/; #include "am33xx.dtsi" #include "am335x-bone-common.dtsi" / { model = "TI AM335x BeagleBone Black"; compatible = "ti,am335x-bone-black", "ti,am335x-bone", "ti,am33xx"; }; &ldo3_reg { regulator-min-microvolt = ; regulator-max-microvolt = ; regulator-always-on; }; &mmc1 { vmmc-supply = ; }; &mmc2 { vmmc-supply = ; pinctrl-names = "default"; pinctrl-0 = ; bus-width = ; status = "okay"; }; &rtc { system-power-controller; }; &am33xx_pinmux { mcasp0_audio_input_pins: mcasp0_audio_input_pins { pinctrl-single,pins = ; }; mcasp0_audio_input_pins_sleep: mcasp0_audio_input_pins_sleep { pinctrl-single,pins = ; }; }; &mcasp0 { pinctrl-names = "default", "sleep"; pinctrl-0 = ; pinctrl-1 = ; status = "okay"; op-mode = ; tdm-slots = ; serial-dir = ; rx-num-evt = ; tx-num-evt = ; }; / { dummy_i2s: dummy_i2s { compatible = "linux,dummy-i2s"; status = "okay"; }; sound@0 { compatible = "ti,dummy-i2s-evm-audio"; ti,model = "Dummy I2S"; ti,audio-codec = ; ti,mcasp-controller = ; ti,codec-clock-rate = ; ti,audio-routing = "ANA IN1", "Internal Mic"; }; }; Anyway, I'm running Linux 4.4.1 and the codec registers correctly after all this. However, when I try to record with arecord, it hangs indefinitely and no audio is produced to the output file. I can verify that the device is producing a 1024000 Hz bit clock and 16000 Hz frame sync clock. I have a 3-wire connection between the codec and my beaglebone with ACLKR, FSR, and AXR0 pins hooked up. A representative from the codec maker has indicated that the codec does not need a master clock but maybe the mcasp/davinci-evm needs one when operating as slave. Does anyone have any experience in these cases? Thanks.
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Forum Post: AM3357 power saving configuration
We are trying to use the combination of Linux, power management, and low power domains on a Sitara. It isn't working too well when we use OPP50 for the core PLL at 300 MHz and all idle states enabled. We're getting resets from the watchdog under stress. Has anyone tried TI RTOS with OPP50 levels? We need the power down to have a product, and only OPP50 levels give us low enough values. We are aware of the limitations of the chip in that mode. We've never made dynamic power and frequency work in Linux. Does it work out-of-the-box in TI RTOS? How low have people made the power in TI RTOS?
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Forum Post: RE: DMTimer Start and Stop Issue (Two DMTimer)
Your latest code includes DMTimer.h. Can you attach that? Steve K.
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