All: Another test picture The result
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Forum Post: RE: TDA2HG: [DSS YUV output] Image incorrect
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Forum Post: RE: AM5728: All frames are dropped when running TIDL usecase with camera
Hi Gary, Use the model and prototxt from below link to get the correct the result for object detection, https://github.com/tidsp/caffe-jacinto-models/tree/caffe-0.16/trained/object_detection/voc0712/JDetNet/ssd768x320_ds_PSP_dsFac_32_hdDS8_0/sparse And use below link for more steps on how run this model, https://e2e.ti.com/support/processors/f/791/t/689617 Thanks, Praveen
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Forum Post: RE: AM5728: PRU Gigabit Ethernet
Hi, No, the PRU-ICSS on AM57x devices supports only 10/100Mbit MII interface.
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Forum Post: TDA2HG: uart will lead to kernel crash
Part Number: TDA2HG Hello, We are using uart2 on IPU1 based VSDK 03 05. But, it will lead to kernel crash. Could you help to have a look? Please find the log in the attachment. Thanks Terence (Please visit the site to view this file)
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Forum Post: RE: TMDX654GPEVM: Uniflash OSPI programming fails
Hi Andreas, I'm very sorry, but still cannot program FlashWriter on Target with Uniflash5.1.0. And also, cannot program the image on OSPI. I listed below my procedures. Please point me if there is different procedures or different version of tools. (I'm basically referring the http://software-dl.ti.com/processor-sdk-rtos/esd/docs/06_00_00_07/rtos/index_board.html#programming-flashwriter-on-am65xx-platform for procedures.) > Host PC: Windows10 64bit Target: AM65x GP EVM SDK: processor_sdk_rtos_am65xx_6_00_00_07 PDK: pdk_am65xx_1_0_5 CCS: v9.01 Uniflash: 5.1.0 or 5.0.0 > 1. Modify the file "C:\ti\pdk_am65xx_1_0_5\packages\ti\drv\sciclient\tools\ccsLoadDmsc\am65xx\launch.js” by referring http://software-dl.ti.com/processor-sdk-rtos/esd/docs/latest/rtos/index_how_to_guides.html#creating-debug-configuration-to-integrate-ccs-gel-and-dmsc-firmware-initialization . (PDK is installed under C:\ti on my environment) Modified from // // Set this to 1 to allow loading the GEL files directly from the ccxml file. disableGelLoad = 0; if (disableGelLoad == 0) { //Path to GEL files gelFilePath = "C:/ti/ ccsv8 /ccs_base/emulation/boards/am65x/gel/"; } // Path to the directory in which this file would be residing. CCS expects // absolute paths to load the binaries. thisJsFileDirectory = " pdk/ packages/ti/drv/sciclient/tools/ccsLoadDmsc"; // to // // Set this to 1 to allow loading the GEL files directly from the ccxml file. disableGelLoad = 1 ; if (disableGelLoad == 0) { //Path to GEL files gelFilePath = "C:/ti/ ccs901 /ccs_base/emulation/boards/am65x/gel/"; } // Path to the directory in which this file would be residing. CCS expects // absolute paths to load the binaries. thisJsFileDirectory = " ../../../ pdk_am65xx_1_0_5/packages/ti/drv/sciclient/tools/ccsLoadDmsc/"; // The default description for gelFilePath was CCS8 (gelFilePath = "C:/ti/ccsv8/ccs_base/emulation/boards/am65x/gel/";). Therefore, I'm afraid if CCS version is important to run the FlashWriter correctly. Currently, I'm using CC9.01 because it's recommended version for processor_sdk_rtos_am65xx_6_00_00_07(pdk_am65xx_1_0_5). Which version of CCS are you using? 2. On CCS, Run->Debug Configurations… 3. Input the file name "C:\ti\pdk_am65xx_1_0_5\packages\ti\drv\sciclient\tools\ccsLoadDmsc\am65xx\launch.js" in Initialization Script and Push the button "Apply" 4. Connect 2 USB cable at J42 and J23 connector on EVM 5. Set all 0 for SW2, SW3, SW4 on EVM (no boot mode) 6. Open the terminal window (teraterm) for COM port. (When connect to J42, COM15/16/17/18 is appeared. Therefore I use COM15.) 7. Power ON the EVM 8. Launch the target 9. Connect A53 10.Load the Flash writer program If I select the "C:\ti\uniflash_5.0.0\processors\FlashWriter\am65xx_evm file in uniflash5.0.0\uart_am65xx_evm_flash_programmer.out" then the character "C" is prompted. However, If I select the .out file in uniflash5.1.0 then the character "C" is NOT prompted. I think, my procedure above could be correct because it works well with Uniflash5.0.0…. Do you have any idea? 11. Close terminal window 12. Reconnect USB cable at J42 13. Cannot run the FlashWrite with Uniflash5.1.0, therefore, I use uniflash5.0.0 for the following test. Run and complete the erase command correctly dslite.bat --mode processors -c COM15 -e 10000 -d 3 -o 0 prompt message is C:\ti\uniflash_5.0.0>dslite.bat --mode processors -c COM15 -e 10000 -d 3 -o 0 Executing the following command: > C:\ti\uniflash_5.0.0\processors\ProcessorSDKSerialFlash.exe -c COM15 -e 10000 -d 3 -o 0 For more details and examples, please refer to the UniFlash Quick Start guide. ---------------------------------------------------------------------------- ProcessorSDKSerialFlash CLI Tool Copyright (C) 2017-2019 Texas Instruments Incorporated - http://www.ti.com/ Version 1.0.0.6 ---------------------------------------------------------------------------- Erasing Flash.... Transferring Header information.. Header Transfer Complete!! Flash Erase Success! 14. Run and failed the image programming on OSPI or RAM dslite.bat --mode processors -c COM15 -f c:\ti\pdk_am65xx_1_0_5\packages\ti\boot\sbl\binary\am65xx_evm\ospi\bin\sbl_ospi_img_mcu1_0_release.tiimage -d 3 -i 1 -o 0 or dslite.bat --mode processors -c COM15 -f c:\ti\pdk_am65xx_1_0_5\packages\ti\boot\sbl\binary\am65xx_evm\ospi\bin\sbl_ospi_img_mcu1_0_release.tiimage Error message is: C:\ti\uniflash_5.0.0>dslite.bat --mode processors -c COM15 -f c:\ti\pdk_am65xx_1_0_5\packages\ti\boot\sbl\binary\am65xx_evm\ospi\bin\sbl_ospi_img_mcu1_0_release.tiimage -d 3 -i 1 -o 0 Executing the following command: > C:\ti\uniflash_5.0.0\processors\ProcessorSDKSerialFlash.exe -c COM15 -f c:\ti\pdk_am65xx_1_0_5\packages\ti\boot\sbl\binary\am65xx_evm\ospi\bin\sbl_ospi_img_mcu1_0_release.tiimage -d 3 -i 1 -o 0 For more details and examples, please refer to the UniFlash Quick Start guide. ---------------------------------------------------------------------------- ProcessorSDKSerialFlash CLI Tool Copyright (C) 2017-2019 Texas Instruments Incorporated - http://www.ti.com/ Version 1.0.0.6 ---------------------------------------------------------------------------- Flashing Image to Flash Writer.. Transferring Header information.. Header Transfer complete! Flashing Image of size 150990 bytes 99% complete Flash Programming Failed!! What is different with your verification environment? Thanks and Best regards, HaTa.
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Forum Post: RE: AM5728: VIP documentation and sample code
Hi, [quote user="HaTa"]Is there a details document for AM57x VIP other than TRM? [/quote] No. [quote user="HaTa"]Is it possible to provide the sample code for VIP?[/quote] This is included in bot the Linux and RTOS Processor SDK: www.ti.com/.../PROCESSOR-SDK-AM57X
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Forum Post: Compiler/TCI6638K2K: Security Violation, Local L1/L2 cahe memory fault
Part Number: TCI6638K2K Tool/software: TI C/C++ Compiler Hi, I am working with SRIO interfcae between TCI6638 and Xilinx FPGA. Trying to transfer data between from processor to FPGA.The code stops at srio_initcfg function from srio_drv.c in the code. Kindly help me to resolve this issue. Thanks in advance. Linux is running in ARM Application runs in DSP Core0 Memory cfg used : L1P and L1D as complete cache memory. L2SRAM for code and stack memory. MSMCSRAM for data memory. While running the application in DSPcore 0. I am getting the following error. A0=0x1 A1 =0x3c A2=0x0 A3=0x8880b0 A4=0x4 A5=0x10 A6=0x0 A7=0x0 A8=0x0 A9=0x3 A10=0x0 A11=0xc006a80 A12=0x0 A13=0x4 A14=0xe0 A15=0xc007720 A16=0x8880b4 A17=0x0 A18=0x888078 A19=0x30 A20=0xec00 A21=0x8c00 A22=0x81000000 A23=0x770000 A24=0x7700 A25=0x720000 A26=0x3b00 A27=0x85 A28=0x232c884 A29=0x4 A30=0x0 A31=0xc006a80 B0=0x0 B1=0x0 B2=0x1 B3=0x8784e0 B4=0x0 B5=0x1 B6=0x888078 B7=0xc B8=0x0 B9=0x0 B10=0x8880d8 B11=0x88815c B12=0x4 B13=0x866fec B14=0xc007d04 B15=0x888058 B16=0x30 B17=0x8880fc B18=0xc005620 B19=0x89 B20=0x0 B21=0x69 B22=0xffffffff B23=0xffffffff B24=0xf90000 B25=0x2f0000 B26=0x72 B27=0xfc00 B28=0xf B29=0x0 B30=0x0 B31=0x0 NTSR=0x1800c ITSR=0x0 IRP=0x0 SSR=0x0 AMR=0x0 RILC=0x0 ILC=0x0 Exception at 0x87850c EFR=0x40000000 NRP=0x87850c DMC Exception MPFAR=0x8 MPFSR=0x120 Security violation, Local L1/L2 cache memory Fault Supervisor Read violation, Fault ID=0x0 ti.sysbios.family.c64p.Exception: line 256: E_exceptionMax: pc = 0x0087850c, sp = 0x00888058. xdc.runtime.Error.raise: terminating execution A0=0x1 A1 =0x3c A2=0x0 A3=0x8880b0 A4=0x4 A5=0x10 A6=0x0 A7=0x0 A8=0x0 A9=0x3 A10=0x0 A11=0xc006a80 A12=0x0 A13=0x4 A14=0xe0 A15=0xc007720 A16=0x8880b4 A17=0x0 A18=0x888078 A19=0x30 A20=0xec00 A21=0x8c00 A22=0x81000000 A23=0x770000 A24=0x7700 A25=0x720000 A26=0x3b00 A27=0x85 A28=0x232c884 A29=0x4 A30=0x0 A31=0xc006a80 B0=0x0 B1=0x0 B2=0x1 B3=0x8784e0 B4=0x0 B5=0x1 B6=0x888078 B7=0xc B8=0x0 B9=0x0 B10=0x8880d8 B11=0x88815c B12=0x4 B13=0x866fec B14=0xc007d04 B15=0x888058 B16=0x30 B17=0x8880fc B18=0xc005620 B19=0x89 B20=0x0 B21=0x69 B22=0xffffffff B23=0xffffffff B24=0xf90000 B25=0x2f0000 B26=0x72 B27=0xfc00 B28=0xf B29=0x0 B30=0x0 B31=0x0 NTSR=0x1800c ITSR=0x0 IRP=0x0 SSR=0x0 AMR=0x0 RILC=0x0 ILC=0x0 Exception at 0x87850c EFR=0x40000000 NRP=0x87850c DMC Exception MPFAR=0x8 MPFSR=0x120 Security violation, Local L1/L2 cache memory Fault Supervisor Read violation, Fault ID=0x0 ti.sysbios.family.c64p.Exception: line 256: E_exceptionMax: pc = 0x0087850c, sp = 0x00888058. xdc.runtime.Error.raise: terminating execution
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Forum Post: RE: CCS/EVMK2H: Fill unused Memory cause ARM fail
Hi,Yordan We used MCSDK Linux for a long time and stable. And our product still run MCSDK Linux. I can try to update to Processor SDK Linux ,but it will take some time .Because I 'm not good at building and burn Linux kernel. So I want to know are there any document or website about MCSDK Linux known issue? Or help document about MCSDK memory map and allocate? Thanks Best Regards Jacky
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Forum Post: RE: AM4372: EMU[1:0] as GPIO
Hi Brad, It's not mentioned anywhere in the AM437x documentation, but I think that AM335x Errata Advisory 1.0.36 will apply for AM437x devices too.
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Forum Post: RE: TDA2PXEVM: TDA2PXEVM
Hi Mayank, Thanks for your reply. I have checked with the leopard imaging team and they have confirmed that they are using the same deserializer(UB954) and serializer(UB953) setting. Here is the link where LI team has mention about the using of deserializer (UB954). https://www.leopardimaging.com/uploads/LI-IMX390-FPDLINKIII-xxxH_datasheet.pdf Regards Mausam Sinha
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Forum Post: RE: TDA3MV: GMAC
Hi Shreyas, I believe your requirement is to have the PHY in Mode 2. As mentioned in detail in the same document, find out the Vmin and Vmax according to the table and then do analysis to find out the Rhi and Rlo which works. Considering the ideal case, the Resistor values you've mentioned match to Mode 3, I believe. Regards, Anand
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Forum Post: RE: Linux/AM3358: UART enable
Hi, You are using Debian Linux, which is not supported by TI. Please direct your questions to the community at www.beagleboar.org
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Forum Post: AM5718: DDR3 bit swapping
Part Number: AM5718 Hi, When routing for DDR3L is there any guideline available for AM5718 's EMIF controller for bit swapping in byte lane , also any guidelines on Lane swapping. I can observe in the AM5718 EVM schematics data lines D0-D8-D16-D24 are not considered for any bit swapping . Any specific reason for this. We use the following DDR3L : : MT41K256M16TW-107 XIT:P TR In micron DDR3L doc i could not find any suggestion
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Forum Post: RE: AMIC110: AMIC ICE heating problem
Hi Bill, I have Measured the Voltages, All Voltages Levels are as per the Specifications. So I think there is no problem with the board. Now I can buy the debugger and start programming. One more small doubt i Have, In the user guide they have mentioned that we can use XDS100 or XDS200 debugger. Can you suggest me which is the best one? Why? Thanks a lot For your support Bill. I hope your cooperation will be like this in the coming future also.
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Forum Post: RE: AM3351: GPMC question
McASP is a serial interface. You cannot send 1-bit parallel data over it.
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Forum Post: RE: TMDSLCDK138: Bootloader
Hi, I have read boot section in psdk developer guide. http://software-dl.ti.com/processor-sdk-rtos/esd/docs/06_00_00_07/rtos/index_Foundational_Components.html?highlight=sbl#boot When should i use SBL? Is it must be used in multi-core chips? I used tms320c6748 before and i didn't use SBL.
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Forum Post: RE: AM5718: DDR3 bit swapping
You can swap all bits within a byte lane. There is no requirement to route LSBs 1:1.
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Forum Post: RE: TDA2HG: how to use the DS90UB933-Q1 Serializer on the TDA2HG device
Hi Terence, If the i2c is on IPU, we have some APIs, that you could call to get status of UB960 device. Let me get back to you for this API. Rgds, Brijesh
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Forum Post: RE: AM3351: GPMC question
Hi Biser, Thank you for your reply. Sorry for the confusion. If using McASP, I would like to send 128 numbers of 10bit serial data within 12.8us by McASP. For example, If using 2 data lines of McASP, I think 64 numbers of serial 10bit data need to be sent at least 50MHz. Is it possible? Regards, U-SK
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Forum Post: RE: AM3352: NAND boot fails
Hi James, Thanks for your confirm that this is optimum value for 600Mhz. And, Sorry for your confusion. They have not tested their board with this new optimum PLL setting and I just want to check with you before their testing. Thanks and Best Regards, SI.
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