Hi Krunal, I have set my GPMC timing parameters in DTS file based on below approach: I have seen below statement in kernel log messages "enable GPMC debug to configure .dts timings for CS0" Towards this I have enabled below option: CONFIG_OMAP_GPMC_DEBUG=y Since NOR flash write is working at Bootloader level and gpmc parameters are carry forwared from bootlader to Kernel. Based on the GPMC dump (kernel_log attached), I have added the same timings to my .dts file. Attachment: New_kernel_log_with_NOR_with_gpmc_dump.txt Next Step: Since we don’t have any board which supports booting from NOR or SPI flash, I was trying to compare new Kernel with that of NAND flash (I am not sure if this is really correct). Towards this I have MitySOM-335x board with 256 MB NAND connected to AM3359 processor using GPMC. We have same kernel version from TI-SDK (V 05.03.00.07) up and running on this board. Here NAND write is working fine. Here the dts file is being provided by MitySOM team. As mentioned in approach 1, I did enable CONFIG_OMAP_GPMC_DEBUG=y and cross verfied the timings of GPMC dump with the DTS file provided by MitySOM. It is not matching and also they have other line items like "gpmc,sync-clk-ps = ;" added which are not present in GPMC dump. Attachment: New_kernel_log_with_NAND_with_gpmc_dump.txt am335x-mitysom-256M.dtsi (DTS file from MitySOM) Other observations: Only GPMC driver being called in approach 2. PHYSMAP driver from physmap.c is not being called. Inference: Considering this now I suspect the GPMC timings in DTS file. How do I cross verify all the timings in NOR dts file? How do I make sure that I have not missed any line items with respect to GPMC timings? Please let us know your input on this. Regards Srinivasa(Please visit the site to view this file)
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