Biser,
Not all NAND is the same.
The NAND that has been chosen for this board has an out of bound region size of 112 bytes which is different from that of the EVM, this affects the ECC scheme and some of the configuration options for U-BOOT, the SPL, and I think the MTD drivers for Linux.
Specifically the defines I listed, which can be found in the board config files e.g. u-boot/include/configs/am335x_evm.h, appear to affect how the SPL stores or interprets the ECC data in the OOB area.
There is additional code in u-boot/drivers/mtd/nand_base.c that I think also needs to be modified and possibly something in the linux code.
I think I've figured out that CONFIG_SYS_NAND_BAD_BLOCK_POS should be NAND_LARGE_BADBLOCK_POS.
Also I believe that CONFIG_SYS_NAND_ECCSIZE should be 512.
What I'm not sure about is CONFIG_SYS_NAND_ECCBYTES and CONFIG_SYS_NAND_ECCPOS, I think these have to do with how many bytes or bits need to be allocated to ECC but I don't know how to figure them out. Basically I think these 2 parameters describe how many bytes of the OOB region are for ECC and where they are located in the region.
There are similar parameters in u-boot/drivers/mtd/nand/nand_base.c, in structure form, but what's interesting is the locations of the ECC data don't seem to match, at least not for the AM335x_EVM configuration.
I did notice that the data data sheet for the part states "The product family requires 8-bit ECC per (512+28)B" but I'm not sure how to relate that to these settings.
This tech note from Macronix seems to answer part of the puzzle but the numbers don't seem to add up and I'd like to understand whats going on.
http://www.macronix.com/Lists/ApplicationNote/Attachments/761/AN0296V2-How%20to%20handle%20the%20spare-byte%20area%20of%20Macronix%20N36%20NAND%20Flash-0918-new.pdf
One thing that might help is if I had the part number for the NAND used on the AM335x_EVM, but I have had trouble finding that.
Thanks,
Matt S.