Hello Wolfgang,
Thank you very much for your help and appreciable.
I have read lot of TI posts that so many people advise to use AM335x series processors so, I think I will go with AM3359 processor and I can avoid NAND gate designs to mingle the CS0 and CS1 address space to get 256MB.
Here, single CS capable to support 256MB memory addressing.
Now, I wish to connect CS0 to NOR flash directly and need to access 256MB NOR flash with GPIO as a address line.
Is it possible ?
AGAIN,
Eventually, I need to drive one GPIO as a address line (A27 ie GPIO1_27 ) to access the 256MB address space for NOR flash.
How can I connect the GPIO to most significant address line to support 256MB NOR flash.
I hope it could be A27 right ?
Thanks a lot for your support.
Any support or suggestions from TI experts.