Forum Post: [AM3352] Clocking - Spread Spectrum LVCMOS for OSC0

Hi AM335x champs,

I'm looking to reduce my 25Mhz EMI on my board by using one of Ti's Spread Spectrum Buffers, CDCS502 or CDCS503 for LVCMOS, to apply dithering to the input clock on OSC0. 

"Section 6.2.2.2 OSC0 LVCMOS Digital Clock Source" in the Datasheet describes the requirements for an LVCMOS clock but doesn't make an mention of Spread Spectrum capable.

Will the DPLL in the AM335x support this an SS clock input?