Forum Post: RE: About the CKE LOW TIME ( time from reset going high to CKE going high on the DDR3) required by JEDEC

Hi,

I have another question. Withe the sequence at below, when did the ZQ_CONFIG should be initialize?

In  AM335x_evm_DDR3.mac(in the AM335X_StarterWare_02_00_01_01), the sequence like this:

Configure all other EMIF registers

Configure  SDRAM_REF_CTRL

Configure  ZQ_CONFIG

Write SDRAM_CONFIG with appropriate value

Now I will modify the sequence  like this:

-----------------

Configure all other EMIF registers

Write SDRAM_REF_CTRL = 0x3100

Configure  ZQ_CONFIG

Write SDRAM_CONFIG with appropriate value

Write SDRAM_REF_CTRL with refresh rate value for normal operation

-----------------

Is that correct?

Thanks!