There are two interrupts per GPIO bank. Inside each GPIO bank there are two GPIO_IRQSTATUS registers which must be read to determine which pin generated the interrupt. See the AM335X TRM Rev. J, sections 6 and 25 for details.
There are two interrupts per GPIO bank. Inside each GPIO bank there are two GPIO_IRQSTATUS registers which must be read to determine which pin generated the interrupt. See the AM335X TRM Rev. J, sections 6 and 25 for details.