Forum Post: RE: How to issue a MRS command to DDR3 SDRAM from AM335x

Hi Biser,

Thank you for your reply.

The DDR is not in self-refresh mode.

Section 7.3.3.11.2 in TRM (SPRUH73J) describes as follows:

  "Exit sequence of self-refresh mode for DDR3 device: The memory controller:"

  "If the REG_DDR_DISABLE_DLL bit in the SDRAM Config register is 1, issues a LOAD MODE
   REGISTER command to the extended mode register 1 with the pad_a_o bits set as follows:"

I have found only this about how to issue a MRS command.

Best regards,

Daisuke