Hi James,
Thanks for your reply. I understood MREQPRIO and INIT_PRIORITY registers were the only input parameters for the interconnects, but it's still unclear for me that we don't have to configure these registers typically.. How these registers can effect to interconnects ?
I seem the interconnects would handle the data traffic appropriately under something interconnect's rule, but as Matthijs said, understanding its rule/scheme should be helpful to debug enigmatic behavior related to heavy data traffic in interconnects.
Best Regards,
Kawada
