Biser-san,
I understood your recommendation is ICEv2.1 reference design.
I have once more question.
On ICEv2.1,
pr1_mii0_rxer(V3) pin is connected to MII_RX_ERR and MII_COL of PHY(U3), which is ORed by logic.
pr1_mii0_col(T11) pin is NOT connected to PHY(U3).
pr1_mii1_rxer(V17) pin is connected to MII_RX_ERR and MII_COL of PHY(U2), which is ORed by logic.
pr1_mii1_col(T17) pin is connected to MII_COL of PHY(U2).
Question)
- Do I have to place the OR logic to operate correctly?
- Can I operate correctly by connect pr1_mii1_col(T17) to MII_COL of PHY(U2), instead of "OR logic"?
Best regards, RY
