Hi Melissa,
Sorry for the delayed response, I have been out of town for the last week and needed some time to catch back up.
Clearing CLKXM and EXTCLKGATE is indeed what is needed despite what is stated in section 21.4.2.3 of the TRM, given that setting CLKXM enables the output buffer. I had tried this previously but was unsuccessful due to a different issue on our board. Now that we resolved our other issue, the following register settings are working just fine for me.
const struct omap_mcbsp_reg_cfg mcbsp_my_config = { .spcr2 = 0x00000200, .spcr1 = 0x00004000, .rcr2 = 0x000080A1, .rcr1 = 0x000000A0, .xcr2 = 0x000080A1, .xcr1 = 0x000000A0, .srgr2 = 0x00002000, .srgr1 = 0x00001F01, .mcr2 = 0, .mcr1 = 0, .rcerc = 0, .rcerd = 0, .pcr0 = 0x00000081, .xccr = 0x00009801, .rccr = 0x00000800, };Thanks for taking the time to look at this.
Gary